1. Field of the Invention
The present invention relates generally to a texture mapping computer graphics system and, more particularly, to a cache memory system for storing texture mapping data.
2. Background of the Invention
Computer graphics systems commonly are used for displaying graphical representations of objects on a two dimensional display screen. Current computer graphics systems can provide highly detailed representations and are used in a variety of applications.
In typical computer graphics systems, an object to be represented on the display screen is broken down into a plurality of graphics primitives. Primitives are basic components of a graphics picture and may include points, lines, vectors and polygons, such as triangles. Typically, a hardware/software scheme is implemented to render, or draw, on the two-dimensional display screen, the graphics primitives that represent the view of one or more objects being represented on the screen.
Typically, the primitives that define the three-dimensional object to be rendered are provided from a host computer, which defines each primitive in terms of primitive data. For example, when the primitive is a triangle, the host computer may define the primitive in terms of the x,y,z coordinates of its vertices, as well as the R,G,B color values of each vertex. Rendering hardware interpolates the primitive data to compute the display screen pixels that are turned on to represent each primitive, and the R,G,B values for each pixel.
Early graphics systems failed to display images in a sufficiently realistic manner to represent or model complex three-dimensional objects. The images displayed by such systems exhibited extremely smooth surfaces absent textures, bumps, scratches, shadows and other surface details present in the object being modeled.
As a result, methods were developed to display images with improved surface detail. Texture mapping is one such method that involves mapping a source image, referred to as a texture, onto a surface of a three-dimensional object, and thereafter mapping the textured three-dimensional object to the two-dimensional graphics display screen to display the resulting image. Surface detail attributes commonly texture mapped include color, specular reflection, vector perturbation, specularity, transparency, shadows, surface irregularities and grading.
Texture mapping involves applying one or more point elements (texels) of a texture to each point element (pixel) of the displayed portion of the object to which the texture is being mapped. Texture mapping hardware is conventionally provided with information indicating the manner in which the texels in a texture map correspond to the pixels on the display screen that represent the object. Each texel in a texture map is defined by S and T coordinates which identify its location in the two-dimensional texture map. For each pixel, the corresponding texel or texels that map to it are accessed from the texture map, and incorporated into the final R,G,B values generated for the pixel to represent the textured object on the display screen.
It should be understood that each pixel in an object primitive may not map in one-to-one correspondence with a single texel in the texture map for every view of the object. For example, the closer the object is to the view port represented on the display screen, the larger the object will appear. As the object appears larger on the display screen, the representation of the texture becomes more detailed. Thus, when the object consumes a fairly large portion of the display screen, a large number of pixels is used to represent the object on the display screen, and each pixel that represents the object may map in one-to-one correspondence with a single texel in the texture map, or a single texel may map to multiple pixels. However, when the object takes up a relatively small portion of the display screen, a much smaller number of pixels is used to represent the object, resulting in the texture being represented with less detail, so that each pixel may map to multiple texels. Each pixel may also map to multiple texels when a texture is mapped to a small portion of an object. Resultant texel data is calculated for each pixel that maps to more than one texel, and typically represents an average of the texels that map to that pixel.
Texture mapping hardware systems typically include a local memory that stores data representing a texture associated with the object being rendered. As discussed above, a pixel may map to multiple texels. If it were necessary for the texture mapping hardware to read a large number of texels that map to a pixel from the local memory to generate an average value, then a large number of memory reads and the averaging of many texel values would be required, which would be time consuming and would degrade system performance.
To overcome this problem, a scheme has been developed that involves the creation of a series of MIP maps for each texture, and storing the MIP maps of the texture associated with the object being rendered in the local memory of the texture mapping hardware. A MIP map for a texture includes a base map that corresponds directly to the texture map, as well as a series of filtered maps, wherein each successive map is reduced in size by a factor of two in each of the two texture map dimensions. An illustrative example of a set of MIP maps is shown in FIG. 1. The MIP (multum in parvo-many things in a small place) maps include a base map 100 that is eight-by-eight texels in size, as well as a series of maps 102, 104 and 108 that are respectively four-by-four texels, two-by-two texels, and one texel in size.
The four-by-four map 102 is generated by box filtering (decimating) the base map 100, such that each texel in the map 102 corresponds to an average of four texels in the base map 100. For example, the texel 100 in map 102 equals the average of the texels 112-115 in map 100, and texels 118 and 120 in map 102 respectively equal the averages of texels 121-124 and 125-128 in map 100. The two-by-two map 104 is similarly generated by box filtering map 102, such that texel 130 in map 104 equals the average of texels 110 and 118-120 in map 102. The single texel in map 108 is generated by averaging the four texels in map 104.
Conventional graphics systems generally download, from the main memory of the host computer to the local memory of the texture mapping hardware, the complete series of MIP maps for any texture that is to be used with the primitives to be rendered on the display screen. Thus, the texture mapping hardware can access texture data from any of the series of MIP maps. The determination of which map to access to provide the texel data for any particular pixel is based upon the number of texels to which the pixel maps. For example, if the pixel maps in one-to-one correspondence with a single texel in the texture map, then the base map 100 is accessed. However, if the pixel maps to four, sixteen or sixty-four texels, then the maps 102, 104 and 108 are respectively accessed because those maps respectively store texel data representing an average of four, sixteen and sixty-four texels in the texture map.
A pixel may not map directly to any one texel in the selected map, and may fall between two or more texels. Some graphics systems employ bi-linear interpolation to accurately produce texel data when this occurs. If a pixel maps into a MIP map between two or more texel entries, then the resulting texel data used is a weighted average of the closest texel entries. Thus, the texel data corresponding to any pixel can be the weighted average of as many as four texel entries in a single map. For example, if a pixel maps to a location in map 102 indicated at 132, the resulting texel data mapping to that pixel would be the weighted average of the texels 110 and 118-120.
Pixels may also not map directly into any one of the maps in the series of MIP maps, and may fall between two maps. For example, a pixel may map to a number of texels in the texture map that is greater than one but less than four. Some graphics systems address this situation by interpolating between the two closest MIP maps to achieve the resultant texel data. For the example above wherein a pixel maps to greater than one but less than four texels in the texture map, the texel data provided by maps 100 and 102 would be interpolated to achieve the resultant texel data for the pixel. When combined with the above-described interpolation of multiple texel entries in a single map, this scheme is known as tri-linear interpolation, and can lead to resultant texel data for any one pixel being generated as a weighted average of as many as eight texels, i.e., the four closest texels in each of the two closest maps.
As discussed above, conventional texture mapping systems download the entire series of MIP maps for any texture associated with primitives to be rendered by the system, even if some of the MIP maps will not be accessed. The downloading of MIP maps that will not be accessed, as well as portions of accessed maps that are not used, is a waste of the system""s resources and reduces its bandwidth.
Furthermore, some texture mapping systems are pipelined so that various operations are performed simultaneously on different object primitives. However, a series of MIP maps for a texture can be large. Most systems employ a local memory that is capable of storing only one such large series of MIP maps at a time. Thus, when there is a switch in the texture used in rendering primitives, the system must download a new series of MIP maps. Typically, the data path used to load the new texture data into the local memory in the texture mapping hardware passes through the system""s primitive rendering pipeline. Therefore, when a new texture is to be mapped, the primitive rendering pipeline must be allowed to empty out before the new series of MIP maps can be downloaded. Once the series of MIP maps is downloaded, the pipeline must again be filled. The necessity of flushing the primitive rendering pipeline each time a new texture is required reduces the system""s bandwidth.
In one illustrative embodiment of the invention, a method is provided for managing blocks of data in a data processing system, the data processing system including a host computer and data processing hardware, the host computer having a main memory that stores blocks of data to be processed by the data processing hardware, the data processing hardware including a local memory that locally stores a subset of the blocks of data to be processed by the data processing hardware. In accordance with the illustrative embodiment, the method comprises the steps of: (a) when a portion of one of the blocks of data is to be processed by the data processing hardware, determining whether the one of the blocks of data is in the local memory; (b) when the one of the blocks of data is in the local memory, reading the portion of the one of the blocks of data to be processed from the local memory; and (c) when the one of the blocks of data is not in the local memory, downloading the one of the blocks of data from the host computer main memory to the data processing hardware.
In accordance with another illustrative embodiment, a data processing system is provided, comprising: a host computer having a main memory that stores blocks of data, the host computer including an interrupt port that receives a signal that interrupts the host computer; data processing hardware that processes blocks of data, the data processing hardware having a local memory that locally stores blocks of data to be processed by the data processing hardware, the data processing hardware generating an interrupt signal when one of the blocks of data to be processed by the data processing hardware is not in the local memory, the interrupt signal being coupled to the interrupt port of the host computer to interrupt the host computer with a request to download the one of the blocks of data to be processed by the data processing hardware; and a data path, coupling the data processing hardware to the host computer, over which blocks of data to be processed by the data processing hardware are passed from the host computer main memory to the local memory in response to the interrupt signal received at the interrupt port of the host computer.
In accordance with another illustrative embodiment, a data processing system is provided, comprising: a host computer having a main memory that stores blocks of data to be processed by the data processing hardware; data processing hardware having a local memory that locally stores blocks of data being processed by the data processing hardware; and means for, when a block of data not stored in the local memory is to be processed by the data processing hardware, downloading the block of data from the host computer main memory to the local memory.